超薄型全數位與混合式相控陣列雷達與無線通信硬體系統
公司網址：https://www.tronfuture.com
工作內容：
1. 與數位訊號處理/軟體工程師合作，在Xilinx FPGA上實現並驗證演算法。
2. Work closely with DSP algorithm team and software team to propose functional architecture and implement DSP algorithm using RTL and verified on a Xilinx FPGA.
3. The verified design will either be passed to back-end for P&R or as a FPGA device product for early customer demo.
需求條件：
1. 熟悉Verilog RTL的撰寫及模擬
2. 熟悉Xilinx FPGA的使用。
. Familiar with Verilog RTL implementation from a matlab, python or c algorithm.
4. Familiar with RTL simulation, timing analysis.
5. Familiar with FGPA digital validation and test pattern generation using (system)ILA, logic analyzer, high-speed oscilloscope, etc.
6. Familiar with Xilinx FPGA serdes IO, and selectIO.
工作地點： 新竹市
所需員額：1